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While machine learning (ML) has attracted a great deal of interest recently, a successful application of ML to design, verification and test is contingent upon addressing domain-specific needs and issues. Effective use of machine learning is conditional upon the availability of design and test data, which in practice can be extremely difficult and costly to acquire. This talk presents data-efficient ML techniques for design-time rare failure detection of analog circuits and wafer map pattern analysis for process monitoring.  

First, we present a data-efficient Bayesian optimization (BO) approach for analog failure detection.  While the sequential learning nature of BO in general allows for efficient identification of design failures based on balanced exploitation and exploration, existing BO techniques do not scale well with the dimensionality of the problem, e.g., number of circuit parameters.  We show that advanced nonlinear dimension reduction techniques not only scale up learning in a high-dimensional feature space, but also lead to improved data efficiency for BO-based failure detection.

Second, wafer map pattern recognition is key to detecting systemic manufacturing process issues, which, however, is hampered by lack of large volumes of manually labeled wafer maps. As such, semi-supervised learning capable of utilizing cheaply available unlabeled data is particularly appealing. We show that contrastive learning, a recent development in semi-supervised learning, offers a promising solution to high-quality wafer map pattern recognition when equipped with domain-specific data augmentations.  



Peng Li received the Ph. D. degree from Carnegie Mellon University in 2003. He is presently a professor of Electrical and Computer Engineering at the University of California, Santa Barbara. His research interests are in integrated circuits and systems, electronic design automation, brain-inspired computing, and applied machine learning.  Li’s work has been recognized by an ICCAD Ten Year Retrospective Most Influential Paper Award, four IEEE/ACM Design Automation Conference (DAC) Best Paper Awards, and best paper awards from ICCAD, ICCD, and ASAP, among other distinctions. A Fellow of the IEEE, he served as the Vice President for Technical Activities of IEEE Council on Electronic Design Automation (CEDA).

Engineering and Computer Science South (ECSS), ECSS 3.910
800 W. Campbell Road, Richardson, Texas 75080-3021

Erik Jonsson School of Engineering and Computer Science, Texas Analog Center of Excellence
Donna Kuchinski

Lectures & Workshops


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